Video: Using Truth Tables to Find the Output of Logic Circuits

The diagram shows a logic circuit consisting of multiple logic gates. The table shows the output for some of the different possible combinations of inputs. What is the value of ๐‘ in the table? What is the value of ๐‘ž in the table? What is the value of ๐‘Ÿ in the table? What is the value of ๐‘  in the table?

06:06

Video Transcript

The diagram shows a logic circuit consisting of multiple logic gates. The table shows the output for some of the different possible combinations of inputs.

So here, we have a circuit diagram showing us three logic gates combined together to form a logic circuit. And here we have a table showing some possible combinations of values for inputs A, B, C, and D and the value for the output in each case.

Now, the first question asks us what is the value of ๐‘ in the table?

And so if we look in the table, we can see that itโ€™s not fully populated with zeros and ones. In fact, for some rows, the output values have been labelled as ๐‘, ๐‘ž, ๐‘Ÿ, and ๐‘ . And the first question is asking us to find the value of ๐‘. So to do this, the first thing that weโ€™re going to do is to identify the logic gates that we find in this logic circuit. We can see that there are three different logic gates but that two of them are identical. This logic gate has the same symbol as this logic gate. Now we can recall, based on their symbols, that these logic gates are in fact OR gates and that the other logic gate, this one here, is an AND gate. And now, once weโ€™ve identified this, itโ€™s worth recalling the truth tables for OR and AND gates. So hereโ€™s the truth table for an OR gate. And hereโ€™s the truth table for an AND gate. Itโ€™s worth noting that weโ€™ve used ๐›ผ and ๐›ฝ in both cases to represent the inputs and ๐›บ to represent the outputs of these gates. So that we avoid confusion with these inputs and this output which has already been labelled in our diagram.

Now, we can see that, for an OR gate, the output is set to one if either input ๐›ผ or input ๐›ฝ is set to one. And for an AND gate, the output is only set to one if both input ๐›ผ and input ๐›ฝ are set to one. Now, coming back to our logic circuit diagram, we can see that the output of the first OR gate becomes one of the inputs to the AND gate. And the same is true for the output of the second OR gate. It becomes the second input to the AND gate. And so it might be worth extending our truth table here slightly. Specifically, it might be worth calling the output of the first OR gate position E and the output of the second OR gate position F. Both E and F then go on to become the inputs to the AND gate. And it might be worth tracking whatโ€™s happening to them, at least in the intermediate stages by adding two extra columns to our truth table. We can delete these once weโ€™ve completed the truth table. But for now, itโ€™ll be useful to have them there.

So with that being said, if weโ€™re trying to calculate the value of ๐‘, then this corresponds to when input A is set to zero, B is set to zero, C is set to zero, and D is set to zero. So letโ€™s start by putting zeros next to input A, B, C, and D. Then, we can see that inputs A and B are the inputs to the first OR gate. So we can work out what the output of that OR gate is going to be. In other words, what E is going to be using the truth table for an OR gate.

We can see that when both inputs to an OR gate are set to zero, then the output is set to zero as well. And therefore, we can see that the output of the first OR gate, which is E, is going to be zero. And then, we can do the same thing for inputs C and D. These are the inputs to the second OR gate. And since both of those are set to zero, we can see that the output of the OR gate, which is F, is going to be zero as well. But then what we have going on is that E and F become the inputs to the AND gate. And since in this particular case both of them are set to zero, we can see that when both inputs to an AND gate are set to zero, the output of the AND gate is zero as well. And hence we can say that the output of the entire logic circuit itself is set to zero. But then, that output value corresponds to ๐‘. And so at this point, we figured out the answer to the first question. The value of ๐‘ in the table is zero. And so having answered this, we can move on to the next question.

What is the value of ๐‘ž in the table?

Now we can see that ๐‘ž is the output value that corresponds to when input A is zero, input B is zero, input C is zero, and input D is one. So letโ€™s put the values zero, zero, zero, and one next to inputs A, B, C, and D, respectively. Then we can see that the inputs to the first OR gate are set to zero. So looking at our OR gateโ€™s truth table, we see that when both inputs are set to zero, the output is zero as well. In other words, in this particular case, the value of E is zero. And then, we can see that inputs C and D are set to zero and one, respectively. And so we can see that when the first input is set to zero but the second input is set to one for an OR gate, the output of the OR gate is one. And so in this case, the value of F is one. And so now what we have going on is the value of E is zero. And the value of F is one. And those are becoming the inputs to the AND gate. And so when the first input to the AND gate is set to zero and the second input is set to one, the output of the AND gate is zero. And so at this point, we found the value of ๐‘ž in our table. The value of ๐‘ž is zero.

Moving onto the next question then, this one asks us what is the value of ๐‘Ÿ in the table?

Now, ๐‘Ÿ corresponds to when input A is zero, input B is zero, input C is one, and input D is one. And so if we set those values next to inputs A, B, C, and D, respectively, we can see that an input of two zeros leads an output of zero for an OR gate. So the value of E is zero whereas a set of two ones as the inputs to an OR gate leads to an output of one. And so the value of F is one. But then, weโ€™ve already seen that if the first input to an AND gate is zero and the second is set to one, then the output of the AND gate is going to be zero. And so our value of ๐‘Ÿ is zero. So we found the answer to this question.

Moving on to our final question then, what is the value of ๐‘  in the table?

Now we can see that ๐‘  corresponds to an input set of zero, one, one, and zero. So writing these down next to inputs A, B, C, and D, we see that when the first input is zero and the second input is one for an OR gate, the output is one. And so we see that the value of E is one. Secondly, we can see for the lower OR gate if the first input is one and the second input is zero, then the output is one as well. So our value of F is one. And so now whatโ€™s happening is that the two inputs to the AND gate, E and F, are both set to one. And we can see that when both inputs are set to one for an AND gate, the output is one as well. Therefore, at this point, we found the value of ๐‘  in our table. So now that weโ€™ve calculated all the values necessary, we can get rid of the columns for E and F. And we can recall that ๐‘ was zero, ๐‘ž was zero, ๐‘Ÿ was zero, and ๐‘  was one.

Nagwa uses cookies to ensure you get the best experience on our website. Learn more about our Privacy Policy.