### Video Transcript

The diagram shows a logic circuit consisting of multiple logic gates. The table shows the output for some of the different possible combinations of inputs. Firstly, what is the value of 𝑝 in the table?

Now, in order to answer this question, we first need to take a look at this diagram and at this table. The diagram is showing us the different logic gates that are combined together to form this logic circuit. And the table is showing us different values for input A, B, C, and D and what the output ends up being for that particular set of input values. So let’s first of all label all of the different kinds of logic gates being used in the diagram.

Now, starting at the top and at the left, we’ve got this gate which happens to be a NOR gate. The one directly beneath it is a NAND gate. The outputs from the NOR gate and NAND gate become the inputs for an OR gate. And the output from this OR gate goes into a NOT gate, after which we finally have our output. So now that we’ve labeled the different kinds of gate in use, we should look at the truth tables that show how each of these gates behaves for any given range of inputs to that gate.

Let’s start with the NOR gate. Now, we’re gonna call the inputs 𝛼 and 𝛽. And we use general terms in the truth tables, even though this specific NOR gates has input A and B. So anyway, we’ve got the inputs 𝛼 and 𝛽 on the NOR gate and O shows the output. Now, a NOR gate is called a NOR gate because the output on the NOR gate is only one when neither input 𝛼 nor input 𝛽 are set to one. In other words, if input 𝛼 is set to zero and input 𝛽 is set to zero, only then is the output one. In any other situation, such as if 𝛼 is zero and 𝛽 is one, the output is zero. Also, if 𝛼 is one and 𝛽 is zero, the input is zero. And if both inputs are set to one, the output is still zero. So that’s the truth table for a NOR gate.

Let’s move on to looking at a NAND gate, which also has two inputs. Once again, we’ve got input 𝛼, input 𝛽, and the output. And we can remember the functionality of a NAND gate by thinking about it as a NOT AND gate. Now, an AND gate only gives an output of one when input 𝛼 and input 𝛽 are one. And the NAND gate is the opposite of this. In other words, it only gives an output of zero when input 𝛼 and input 𝛽 are one. And of course, all the other combinations give that opposite output as an AND gate as well. So if both inputs are zero, then the output of a NAND gate is one. If 𝛼 is set to zero and 𝛽 is set to one, then the output is still one. If 𝛼 is set to one and 𝛽 to zero instead, the output is still one. But if input 𝛼 is one and input 𝛽 is one as well, then the output is zero. So that’s the truth table for a NAND gate.

Let’s move on then to the OR gate. Yet again, we can see that the OR gate has two inputs and one output. So we’ll have 𝛼, 𝛽, and output once again. Now an OR gate is called as such because it gives an output of one if either input 𝛼 or input 𝛽 are one. In other words, if both inputs are set to zero, then the output is zero as well. But if 𝛼 is zero and 𝛽 is one, then the output is one. If 𝛼 is one and 𝛽 is zero, the output is still one. And if both the inputs are set to one, then the output is one once again. So now, we can see that we only need one of the inputs to be one and both could be one as well and the output would still be one. So that’s the truth table for an OR gate.

Finally, we have a NOT gate. Now, a NOT gate is different because it only has one input and one output. And so it is going to need fewer rows and columns. We only need input 𝛼 this time not input 𝛽 and we need the output as well. Now, a NOT gate changes the output to whatever the input is not. In other words, if the input is zero, then the output is one and if the input is one, then the output is zero. It just flips the result basically. And at this point, we have a truth table for each one of the gates used in the circuit.

So let’s see what happens for different values of input A, input B, input C, and input D. Now, in this part of the question, we’re trying to find the value of 𝑝. 𝑝 is the output value for when input A is set to zero, input B is set to zero, input C is set to zero, and input D is set to zero. So let’s go about doing that. Let’s say that input A is zero and input B is zero. Now, input A and input B are the inputs to a NOR gate. So we use the truth table for a NOR gate. And we look at the column that tells us that both inputs are set to zero.

So here, the first input is zero, the second input is zero, and so the output is going to be one. So we set the output of the NOR gate to be one. But then this output becomes one of the inputs to the OR gate, but we’ll come back to that later. We also know that input C and input D are set to zero in this situation. So set input C to zero and input D to zero. Now, input C and D are going into a NAND gate. So we use the NAND truth table. And once again, we go to the row that tells us that the first input is zero and the second input is zero as well. Now, the output to this is going to be one. So we set the output of the NAND gate to be one as well. And once again, this output becomes the second input to the OR gate.

So now, what we have is an input of one and a second input of one to the OR gate. So let’s look at the OR gate and, more specifically, the row that tells us that the first input is set to one and the second input is set to one as well. Well, in that case, the output is one. So the output of the OR gate is one and this becomes the input to the NOT gate.

So finally, we look at the table for the NOT gate. And if we’ve got an input of one, then the output is going to be zero. And hence, this output is zero. Therefore, the value of 𝑝 is zero. And so that is our answer. So let’s set 𝑝 is equal to zero in our table and move on to the next part of the question.

What is the value of 𝑞 in the table?

So now, we’re trying to find the value of 𝑞. This value is the value of the output when input A is set to zero, input B to one, input C to one, and input D to zero. So let’s set all of the inputs to be those values and see what happens.

So we’ve set the inputs to the required values, zero, one, one, and zero. And we can start once again with the NOR gate. In the NOR gate, we’ve got the first input as zero and the second input as one. So that corresponds to this row. The first input is zero, the second input is one, and the output on that row is zero. So we stick that on the output of the NOR gate.

Moving on to the NAND gate then, we’ve got the first input as one and the second input as zero. So that’s this row here — first input, one, second input, zero. And we can see that the output is one. Hence, what we’ve got now is that the first input of the OR gate is zero and the second input is one. So that’s this row here — first input, zero, second input, one. And the output for that situation for the OR gate is one.

Finally, looking at the NOT gate, if the input is one, then the output is zero. And hence, that output here is zero. Therefore, the value of 𝑞 is zero. And that is our answer to this part of the question.

Moving on then, what is the value of 𝑟 in the table?

Now, 𝑟 corresponds to when input A is one, input B is zero, input C is one, and input D is one. So for the NOR gate, the first input is one and the second input is zero. That corresponds to this row — first input, one, second input, zero. Output is zero. And for the NAND gate, both inputs are one. So that corresponds to this row — first input, one, second input, one. Output is zero. Now, those two outputs become inputs for the OR gate. And we’ve got zeros going into both the inputs of the OR gate. So that’s this row here — both inputs, zero. And the output to that is zero. And then for the NOT gate, we’ve got this row where the input is zero. And so the output is going to be one. And hence, the value of the output, which is the value of 𝑟, is one.

So we’ve just found the value of 𝑟 which means we can move on to finding the value of 𝑠.

What is the value of 𝑠 in the table?

Okay, so 𝑠 corresponds to input A being one, input B being one, input C being zero, and input D being one. So yet again, we set the inputs to the required values and we go along the truth tables. For the NOR gate, both inputs are one and so that corresponds to this row. First input is one, second input is one, and the output is zero. Moving on to the NAND gate, first input is zero and second input is one. That’s this row here — first input, zero, second input, one. Output is one. Moving on to the OR gate then, we’ve got an input of zero and a second input of one. So that’s this row here — first input, zero, second input, one. And output is one. And then finally, the input of the NOT gate is one. So the output is zero. And hence, the value of 𝑠 is zero, at which point we found the values of all the unknowns in the table.

𝑝 is equal to zero, 𝑞 is equal to zero, 𝑟 is equal to one, and 𝑠 is equal to zero.